A semiconductor device may be highly integrated to meet demands of high performance and low costs. For example, an integration degree of a two-dimensional (2D) or planar semiconductor device may be primarily determined by an area used for a unit memory cell. Therefore, the integration density of the 2D or planar semiconductor device may depend on a technique used for a fine pattern formation. However, equipment used for such a fine pattern formation in a 2D or planar semiconductor manufacturing process may have a high cost and, therefore, a cost of manufacture may limit an increase of the integration density of the 2D or planar semiconductor device.
A three-dimensional semiconductor memory device including three-dimensional memory cells may reduce or overcome the above limitations.